Setting up a makefile

[Daleth]

IDE: Code::Blocks v12
Compiler: g++

I am waaaaay out of my comfort zone here.

I am trying to write a makefile, so I can avoid this directive with ellipses in my project files:
#include "../h/BotTemplate.h"
(If you know of a simple solution, please by all means share.)
I've been referencing some makefile tutorials and using the makefile from ChessPlusPlus on github as an example for my own, but according to a Code::Block's manual, I have to build an empty project in order to use a custom makefile.
Now I have two obstacles:
1) I have no idea how to set up an empty project for C++ as I cannot find any tutorials for Code::Blocks with empty projects.
2) My compiler is unable to execute my makefile.

FT_MAKE.make

# FT_MAKE.make
# Makefile for the Abstract/Factory test project
# Of the project, the following files should be included:
# -main.cpp
# -From the h directory:
# --BotTemplate.h
# --Extensions.h
# --Parts.h
# -From the src directory:
# --BotTemplate.cpp
# --Extensions.cpp
# --Parts.cpp

# Compiler variables
MAINCOM = g++
# Flags
COM = -c
OBJCOM = -o
# Project file variables
OBJ = main.cpp.o BotTemplate.o Extensions.o Parts.o
SRC = main.cpp BotTemplate.cpp Extensions.cpp Parts.cpp

# Create final exe file
Factory_Test : main.cpp.o BotTemplate.o Extensions.o Parts.o
	$(MAINCOM) $(OBJCOM) Factory_Test $(OBJ)
# Create object files
main.o : main.cpp BotTemplate.h Extensions.h Parts.h
BotTemplate.o : BotTemplate.cpp BotTemplate.h Extensions.h Parts.h
Extensions.o : Extensions.cpp Extensions.h Parts.h
Parts.o : Parts.cpp Parts.h
# Build the object files
$(OBJ) : $(SRC)
	$(MAINCOM) $(COM) $(SRC)
	
clean:
	rm $(OBJ) Factory_Test

Edit:
Fixed typos.

[ne555]

#include "..\h\BotTemplate.h" please use forward slashes
in order to change it to #include "BotTemplate.h" you can simply use the -I flag
CPPFLAGS += -I../h

Edit: put the path relative to where `make' executes.

[Daleth]

Oop, sorry. That was a typo.
And thanks.