User profile: ne555

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User name:ne555
Bio:These devices are precision timing circuits capable of producing accurate time delays or oscillation. In the time-delay or monostable mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the astable mode of operation, the frequency and duty cycle can be controlled independently with two external resistors and a single external capacitor.
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edit: need some help
@nedo: you are stopping too late [code]while( geline(input, line) )[/code]

compailing problem
http://www.cplusplus.com/forum/articles/40071/#msg216270 grep error

SPOJ
remember that stdin and stdout are [i]different[/i] streams Also, clarity

SPOJ
> you need to gather all the input (upto 10) and then produce the output. Nope.

SWAP LHS to RHS using VIM
^f=2ld$^Pldt $p