Entry-level C++ developer position
Financial services firm on Wall St. is seeking a highly motivated C++/UNIX developer right out of college.
These positions allow for the unique opportunity to develop both technical and business skills in the financial industry. The position also offers substantial exposure to the trading industry and to the complete trading cycle.
Required Skills:
- 2 years of experience programming in C++ academically
- In depth knowledge of UNIX
- Bachelor’s Degree in Technology
- Excellent communication skills
- Ability to work on multiple projects at the same time
Responsibilities:
- Develop and implement solutions for integrating the firm’s products with those of our clients. This involves software development in C++ on a UNIX platform
- Support the firm’s products at client sites on an ongoing basis. This requires team members to learn the trading functionality and the backend functionality as well
- Build tools and scripts to automate the installation and trouble shooting of the system
This is a full time position with a base salary of $60k-$75k (depending on experience) plus bonus.
These positions allow for the unique opportunity to develop both technical and business skills in the financial industry. The position also offers substantial exposure to the trading industry and to the complete trading cycle.
Required Skills:
- 2 years of experience programming in C++ academically
- In depth knowledge of UNIX
- Bachelor’s Degree in Technology
- Excellent communication skills
- Ability to work on multiple projects at the same time
Responsibilities:
- Develop and implement solutions for integrating the firm’s products with those of our clients. This involves software development in C++ on a UNIX platform
- Support the firm’s products at client sites on an ongoing basis. This requires team members to learn the trading functionality and the backend functionality as well
- Build tools and scripts to automate the installation and trouble shooting of the system
This is a full time position with a base salary of $60k-$75k (depending on experience) plus bonus.
COVER LETTER:
Dear Hiring Manager,
My name is Raj M. Shah and I am very much interested in an Entry Level C++ Developer's position with your company.
My academic program at International Technological University prepared me well for a career in Engineering. I graduated in August 2008 with a Master's degree in Electrical Engineering. As you will note on my enclosed resume, I have supplemented my formal course work with a co-op at Silicon Test Group as a member of Design and Test Engineer. This experience coupled with my academic background makes me an excellent candidate for your Engineering Team.
I have efficiently worked on C/C++, Digital Systems, Data Processing, CAD/CAE tools. I really enjoy working on each phase of product development cycle because, every time is a new learning experience for me.
I believe that I am a suitable candidate for this position because, requirement certainly matches with my educational background and skills. On top of that, I have proven my interpersonal skills as an Engineer and that is why people like working me and I hope your team will enjoy too.
Thank you for your time. I would very much like to meet with you to further discuss my interest in your company. My phone number is (408) 306-6016 and my e-mail address is eerajshah@gmail.com.
Sincerely,
Raj M. Shah
-----------------------------------------------------------------------------------------------------------------------
RESUME
Raj M. Shah
148 E William St, Apt # 24, San Jose, CA 95112
(408) 306 6016
eerajshah@gmail.com
Education:
M.S. in Electrical Engineering, GPA 3.76/4.0 (Aug 06 - Aug 08)
International Technological University, USA
B.S in Electrical Engineering, GPA 3.5/4.0 (Jul 02 - Jul 05)
ACE, University of Mumbai, India
Skills:
C/C++, PERL, Verilog, VHDL and Assembly Language 8085/86/51
HP93K, Logic Analyzer, Digital Oscilloscope, Waveform Generator, DMM, etc
Cadence OrCAD, Mathwork's MATLAB, National Instrument's LABVIEW, Xilinx's ISE 8.2i, Synopsy's Synplify Pro, Mentor Graphic's ModelSim, LASI and Microsoft's Visual Studio
Windows, UNIX, LINUX, MAC OS X, OS/2 and Microsoft / Open Office
Work Experience:
Volunteer Research Assistant, ITU, CA (Jan 09 - Present)
Assisting on research projects and lab work
Design and Test Engineer, Silicon Test Group, Santa Clara, CA (Dec 07 – Aug 08)
Worked closely with the customers to troubleshoot their problems
Support in production testing at wafer and package level on HP93K Series Testers
Reviewed product requirements, logic diagrams and prepared product qualification reports
Involved in programming and RMA to test semiconductor devices
Responsible for performing preliminary failure analysis on qualification failures and customer returns
Teaching Assistant, ITU, CA USA (Oct 07 – Apr 08)
Conducted review sessions for Graduate course in Digital Signal Processing and High Speed System Design
Project Intern, BARC (Bhabha Atomic Research Center) Mumbai, India (Jun 04 – May 05)
Worked with a group of 3 & implemented a project “Auto Ranging Analog Count Rate Meter using Micro-controller for Radiation Gamma Counter” from initial design phase to final implementation. Played major and leading role
Tools Used: IDE51-C Compiler.
Projects:
Designed a 6-bit current steering DAC operational at 200 MHz using 0.25 micron CMOS technology in LASI
Designed an 8-bit counter using 0.25 micron CMOS technology in LASI
Paper presented on "RF and SOC Devices" at STG, Santa Clara, CA
Paper presented on "Musical Sound Processing" for DSP class at ITU, CA
Digital Alarm Clock – An IP Core Implemented on SPARTAN 3E FPGA Kit
Paper presented on "FeRAM" at ITU, CA
Paper presented on "Video Compression" at Pune Institute of Technology, India
Certification:
Have under gone certified training at Roos Instruments for Tester RF 7100A and Cassini
Recommendations:
Available upon request
Dear Hiring Manager,
My name is Raj M. Shah and I am very much interested in an Entry Level C++ Developer's position with your company.
My academic program at International Technological University prepared me well for a career in Engineering. I graduated in August 2008 with a Master's degree in Electrical Engineering. As you will note on my enclosed resume, I have supplemented my formal course work with a co-op at Silicon Test Group as a member of Design and Test Engineer. This experience coupled with my academic background makes me an excellent candidate for your Engineering Team.
I have efficiently worked on C/C++, Digital Systems, Data Processing, CAD/CAE tools. I really enjoy working on each phase of product development cycle because, every time is a new learning experience for me.
I believe that I am a suitable candidate for this position because, requirement certainly matches with my educational background and skills. On top of that, I have proven my interpersonal skills as an Engineer and that is why people like working me and I hope your team will enjoy too.
Thank you for your time. I would very much like to meet with you to further discuss my interest in your company. My phone number is (408) 306-6016 and my e-mail address is eerajshah@gmail.com.
Sincerely,
Raj M. Shah
-----------------------------------------------------------------------------------------------------------------------
RESUME
Raj M. Shah
148 E William St, Apt # 24, San Jose, CA 95112
(408) 306 6016
eerajshah@gmail.com
Education:
M.S. in Electrical Engineering, GPA 3.76/4.0 (Aug 06 - Aug 08)
International Technological University, USA
B.S in Electrical Engineering, GPA 3.5/4.0 (Jul 02 - Jul 05)
ACE, University of Mumbai, India
Skills:
C/C++, PERL, Verilog, VHDL and Assembly Language 8085/86/51
HP93K, Logic Analyzer, Digital Oscilloscope, Waveform Generator, DMM, etc
Cadence OrCAD, Mathwork's MATLAB, National Instrument's LABVIEW, Xilinx's ISE 8.2i, Synopsy's Synplify Pro, Mentor Graphic's ModelSim, LASI and Microsoft's Visual Studio
Windows, UNIX, LINUX, MAC OS X, OS/2 and Microsoft / Open Office
Work Experience:
Volunteer Research Assistant, ITU, CA (Jan 09 - Present)
Assisting on research projects and lab work
Design and Test Engineer, Silicon Test Group, Santa Clara, CA (Dec 07 – Aug 08)
Worked closely with the customers to troubleshoot their problems
Support in production testing at wafer and package level on HP93K Series Testers
Reviewed product requirements, logic diagrams and prepared product qualification reports
Involved in programming and RMA to test semiconductor devices
Responsible for performing preliminary failure analysis on qualification failures and customer returns
Teaching Assistant, ITU, CA USA (Oct 07 – Apr 08)
Conducted review sessions for Graduate course in Digital Signal Processing and High Speed System Design
Project Intern, BARC (Bhabha Atomic Research Center) Mumbai, India (Jun 04 – May 05)
Worked with a group of 3 & implemented a project “Auto Ranging Analog Count Rate Meter using Micro-controller for Radiation Gamma Counter” from initial design phase to final implementation. Played major and leading role
Tools Used: IDE51-C Compiler.
Projects:
Designed a 6-bit current steering DAC operational at 200 MHz using 0.25 micron CMOS technology in LASI
Designed an 8-bit counter using 0.25 micron CMOS technology in LASI
Paper presented on "RF and SOC Devices" at STG, Santa Clara, CA
Paper presented on "Musical Sound Processing" for DSP class at ITU, CA
Digital Alarm Clock – An IP Core Implemented on SPARTAN 3E FPGA Kit
Paper presented on "FeRAM" at ITU, CA
Paper presented on "Video Compression" at Pune Institute of Technology, India
Certification:
Have under gone certified training at Roos Instruments for Tester RF 7100A and Cassini
Recommendations:
Available upon request
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