VGA Graphics Mode register VS Sequencer Memory Mode register?

I notice that both register have data concerning Odd/even VS planar memory mode (by the CPU accessing the area between 0xA0000-0xBFFFF).


Graphics Mode Register (GRAPHICS)
OE When set to 1, the Odd/Even field (bit 4) selects the
odd/even addressing mode used by the IBM
Color/Graphics Monitor Adapter. Normally, the value
here follows the value of Memory Mode register bit 2 in
the sequencer.

Memory Mode Register (SEQUENCER)
CH4 The Chain 4 field (bit 3) controls the map selected
during system read operations. When set to 0, this bit
enables system addresses to sequentially access data
within a bit map by using the Map Mask register. When
set to 1, this bit causes the 2 low-order bits to select the
map accessed as shown in the following figure.
Figure 2-37. Map Selection, Chain 4
Address
Bits
A1 A0 Map Selected
0 0 0
0 1 1
1 0 2
1 1 3
OE When the Odd/Even field (bit 2) is set to 0, even system
addresses access maps 0 and 2, while odd system
addresses access maps 1 and 3. When set to 1, system
addresses sequentially access data within a bit map,
and the maps are accessed according to the value in
the Map Mask register (hex 02).


Which of these 2 OE bits determine what mode the CPU reads/writes memory with? (Odd/even vs planar mode)

Should the memory mode register (CRTC) be used for this? What effect does the Graphics Mode register OE flag have on written/read data and output?
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